DGS255 - Digital Systems
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|Last revision date||Apr 8, 2013 12:15:07 AM|
|Last review date||Apr 8, 2013 12:15:07 AM|
This course familiarises the student with the basic principles of digital logic and digital integrated circuits, including Programmable Logic devices (PLDs). Upon completion of the course the student will be able to describe and analyse logic circuit operation and use a programmable logic development system to program a PLD to implement simple digital systems. The course examines the basis of digital logic in the binary number system and Boolean algebra, the operation of combinational and sequential logic and the general interfacing requirements of digital logic circuits. A number of applications, implemented with a PLD, will be examined including basic gate circuits, flip-flops, decoders and sequential circuits such as counters.
The student will be expected to use the World-Wide-Web (WWW) for reference material and documentation relevant to the course and to have email.
One subject credit in the Computer Engineering Technology program and the Electronic Engineering Technology program.
Upon successful completion of this subject the student will be able to:
1. On completion of Unit #1, Number Systems and Logic Gates, the student will be able to:
(1) Describe some differences between analogue and digital electronics.
(2) Describe the concept of HIGH and LOW logic levels.
(3) Convert a decimal number to its binary equivalent and vice-versa.
(4) Convert a binary number to its hexadecimal equivalent and vice-versa.
(5) Translate logic HIGHs and LOWs to binary numbers.
(6) State the weight of each digit of a binary number.
(7) Determine the frequency, period and duty cycle of a digital waveform.
(8) Waveform Generation555 Timer
(9) Describe the basic logic functions of AND, OR and NOT.
(10) Describe the derived logic functions of NAND, NOR, XOR, and XNOR.
(11) Draw the truth table for a logic gate.
(12) Draw the logic gate given the truth table.
(13) Draw a logic circuit to solve simple design problems given in word form.
(14) Convert logic gates to their DeMorgan equivalent form and vice-versa.
(15) State the active logic level at the input to a logic circuit.
(16) Describe the enable/inhibit properties of logic gates.
(17) Use switches to implement basic logic functions.
2. On completion of Unit #2, Logic Gate Networks and Boolean Algebra, the student will be able to:
(1) Determine the Boolean expression of a logic circuit diagram.
(2) Describe the interrelationship between a Boolean expression, its truth table and logic circuit and be able to derive any one from either of the other two.
(3) Draw the equivalent logic circuits for XOR and XNOR functions.
(4) Simplify Boolean expressions using the rules and theorems of Boolean algebra.
(5) Simplify logic gate circuits using bubble-to-bubble (DeMorgan) conversion.
(6) Simplify logic circuits using the rules of Boolean algebra on circuit's derived expressions and/or truth table.
(7) Define Sum-of-products and Product-of-Sums.
(8) Use Karnaugh mapping techniques to reduce Boolean expression to their simplest forms.
(9) Draw timing diagrams describing the pulsed operation of logic circuits.
(10) Design logic circuits from a word description of the requirement.
3. On completion of Unit #3, Introduction to Programming Logic Architectures the student will be able to:
(1) Draw a diagram showing the basic hardware conventions for a sum-of-products-type programmable logic device.
(2) Describe the structure of a programmable array logic (PAL) AND matrix
(3) Draw fuses on the logic diagram of a PAL to implement simple logic functions
(4) Describe the structures of combinational, programmable polarity and registered PAL outputs
(5) Determine the number and type of outputs from PAL/GAL part number
(6) Explain the structure of an output logic Macrocell (OLMC)
(7) State the differences between Universal PAL and Generic Array Logic (GAL) and standard PAL
(8) Interpret the logic diagrams of a Universal PAL and GAL devices to determine the number of outputs and product terms and the type of control signals available in a device
(9) Interpret block diagrams to determine the basic structure of an Altera MAX7000S CPLD, including macrocell configuration, Logic Array Blocks (LABs) control signal and product term expanders
(10) State the differences between PLDs based on sum-of-products (SOP) architecture versus look-up table (LUT) architecture
(11) Interpret block diagrams to determine the basic structure of a logic element in an Altera FLEX 10K CPLD, including look-up tables, cascade chains, carry chains and control signals
(12) Interpret block diagrams to determine how a logic element in a FLEX 10K device relates to the overall structure of the device
(13) Interpret block diagrams to determine how logic array blocks and embedded array blocks relate to the overall structure of the FLEX 10K CPLD
4. On completion of Unit #4, Introduction to VHDL, the student will be able to:
(1) Enter simple combinational logic circuits in VHDL using the appropriate software Text Editor.
(2) Assign a target device and pin numbers and compile a VHDL design file.
5. On completion of Unit #5, Combinational Logic Circuits, the student will be able to:
(1) Design binary decoders using logic gates.
(2) Create decoder designs in the appropriate software, using Graphic Design Files or VHDL.
(3) Create appropriate software simulation files to verify the operation of combinational circuits.
(4) Explain the operation and use of common cathode and common anode seven-segment displays.
(5) Describe the operation of decoders used for driving seven-segment displays.
(6) Describe ripple-blanking and its application to displays consisting of multiple seven-segment display units.
(7) Specify logic circuits capable of driving seven-segment displays.
(8) Implement a hexadecimal-to-seven-segment decoder in an Altera CPLD.
(9) Design priority encoder using logic gates.
(10) Create Encoder Design with appropriate software, using Graphic Design Files or VHDL.
(11) Design multiplexer using logic gates.
(12) Create MUX with appropriate software, using Graphic Design Files or VHDL.
(13) Design Demultiplexer using logic gates.
(14) Create Demultiplexer using appropriate software.
(15) Describe the operation of CMOS Analog MUX/DEMUX.
(16) Design Magnitude comparators using logic gates.
(17) Create Magnitude Comparator with appropriate software.
(18) Design Parity Generators and Checkers using logic gates.
6. On completion of Unit #6, Digital Arithmetic and Arithmetic Circuits, the student will be able to:
(1) Add or subtract two unsigned binary numbers
(2) Write a signed binary number in true-magnitude, 1's complement, or 2's complement notation
(3) Add or subtract two signed binary numbers
(4) Explain the concept of sign-bit overflow
(5) Calculate the maximum sum or difference of two signed numbers that will not result in an overflow
(6) Derive the logic gate circuits for half and full adders, given their truth tables
(7) Demonstrate the use of half and full adder circuits in arithmetic applications
(8) Add and subtract two n-bit numbers, using parallel adders and logic gates
(9) Explain the difference between ripple carry and parallel carry
(10) Design a circuit to detect sign bit overflow in a parallel carry
(11) Use VHDL to program a CPLD to perform various arithmetic functions, such as parallel adder/subtractor, overflow detector, and 1;s complementer
7. Practical application circuits, discussion/analysis
Essential Employability Skills
Communicate clearly, concisely and correctly in the written, spoken and visual form that fulfils the purpose and meets the needs of the audience.
Respond to written, spoken, or visual messages in a manner that ensures effective communication.
Execute mathematical operations accurately.
Apply a systematic approach to solve problems.
Use a variety of thinking skills to anticipate and solve problems.
Locate, select, organize, and document information using appropriate technology and information systems.
Analyze, evaluate, and apply relevant information from a variety of sources.
Show respect for diverse opinions, values, belief systems, and contributions of others.
Interact with others in groups or teams in ways that contribute to effective working relationships and the achievement of goals.
Manage the use of time and other resources to complete projects.
Take responsibility for one's own actions, decisions, and consequences.
Cheating and Plagiarism
Each student should be aware of the College's policy regarding Cheating and Plagiarism. Seneca's Academic Policy will be strictly enforced.
To support academic honesty at Seneca College, all work submitted by students may be reviewed for authenticity and originality, utilizing software tools and third party services. Please visit the Academic Honesty site on http://library.senecacollege.ca for further information regarding cheating and plagiarism policies and procedures.
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Accommodation for Students with Disabilities
The College will provide reasonable accommodation to students with disabilities in order to promote academic success. If you require accommodation, contact the Counselling and Disabilities Services Office at ext. 22900 to initiate the process for documenting, assessing and implementing your individual accommodation needs.